Active-HDL 6.3 Student Edition CD-ROM
Aldec

For laboratory courses in Digital Design and courses in Advanced Digital Logic, offered in Electrical Engineering departments. This entry-level Electronic Design Automation (EDA) software tool is based on the same award-winning EDA tool used by professional logic circuit designers every day.  Using the identical menus, icons and design flows that have become EDA industry standards, students can become familiar with digital logic design methodologies that use Hardware Description Languages (VHDL and Verilog) or a Block Diagram Editor or a Finite State Machine Editor to create and compile designs. Students can then create testbenches and simulate these designs, using Active-HDL to debug logic circuits in preparation for Synthesis and Implementation to Programmable Logic printed circuit development boards used in Digital Design labs. Programmable Logic devices on these development boards can include Complex Programmable Logic Devices (CPLD), Field Programmable Gate Arrays (FPGA), and structured Application Specific Integrated Circuits (ASIC). Introductory self-paced tutorials that teach VHDL and Verilog programming techniques are also available on the Active-HDL Student Edition 6.3 CD-ROM for reference while creating and compiling a Hardware Description Language (HDL) design." * Experimentation with entry level "softcore" Intellectual Property (IP) design entry techniques - Allowed through the use of an IP Core Generator.  - Helps students design small IP components that can then be placed into larger designs.  - Industry-standard 32-bit "softcore" microprocessors, such as the Xilinx MicroBlaze (r) and Altera NIOS (r) can be imported into Active-HDL Student Edition 6.3.- "Behavioral models" that are created at this level can then be simulated and debugged using Aldec's advanced but "easy-to-use" simulation features such as an Automatic TestBench Generation Wizard and a Waveform Viewer.   * Onboard sample designs and training exercises - Show how to implement a logic circuit design onto a semiconductor platform like a Complex Programmable Logic Device (CPLD) or a Field Programmable Gate Array (FPGA).  - The final working prototype of the design is created by interfacing to Synthesis and Implementation software tools as well as PC development boards from other EDA vendors and manufacturers like Synplicity, Xilinx, Altera, Quicklogic, Actel, Lattice Semiconductor, Atmel, Cypress Semiconductor, Avnet, Memec-Insight, Digilent, and others.   * Design Entry features:- Support for either Verilog or VHDL language designs (non-mixed) - Verilog and VHDL libraries - Hardware Description Language Editor (HDE) - Block Diagram Editor (BDE)- Finite State Machine Editor (FSM) - 20 Block Diagram Editor (BDE) or Functional Unit Block (FUB) symbols available to generate designs. (Note: Designer can also view design with more than 20 symbols but cannot save and generate code for more than 20 symbols). - 20 Finite State Machine (FSM) states are available (including hierarchical states) for design. - Multiprocess capability available for VHDL and FSM- 20 kBytes capacity of VHDL/Verilog files available in compilation format - Intellectual Property (IP) Core Generator- Export2HTML (Note: Up to 200 lines of HTML code for BDE or FSM or HDE) ---Capability to print whole design/Workspace- "Import Project" scripts for the Altera NIOS (tm) and Xilinx MicroBlaze (tm) 32-bit "softcore" microprocessor IP cores. * Simulation and Debugging features:- VHDL/Verilog Testbench generation with easy to use "wizard" for creating input stimulus signals- Waveform Viewer- Follow Objects feature for debugging- 20 MBytes of Memory Space available for simulation  * Synthesis and Implementation to Programmable Logic Device: - Flow interfaces available for third party EDA tools (ask for more information)- TCL/TK scripting available * Educational References:- Sample Designs- EVITA Verilog and VHDL tutorials- "Language to Design" Training Exercises 

Informacje dodatkowe o Active-HDL 6.3 Student Edition CD-ROM:

Wydawnictwo: angielskie
Data wydania: b.d
Kategoria: Informatyczne
ISBN: 978-0-13-186697-3
Liczba stron: 0